1. Technical Field
The present invention relates generally to integrated circuits designed to filter an input signal and, more specifically, to an integrated circuit having a programmable hysteresis for receiving an input signal and generating a time-shifted, glitch-free version of the input signal.
2. Introduction
In general, deglitching circuitry is designed to filter one or more unwanted transients in an input signal, also known as glitches or noise, to produce an output signal that replicates the input signal without the glitches. Conventional deglitching circuitry typically implements a chain of flip-flops clocked on a fixed time interval for sampling the input signal at each clock cycle, wherein each sample taken by a flip-flop is stored as a single bit using the flip-flop or some other memory element. For example, to sample an input signal for 10 clock cycles, a conventional deglitcher requires 10 flip-flops—one for each sample during the interval. The sampling occurs for the 10 clock cycles, and each sample is stored in a flip-flop (or other memory element). The output signal is then constructed after the sampling is complete using the data stored in the flip-flops. However, as the sampling interval is increased, the need for more resources (i.e., flip-flops and/or other memory elements) also increases. Naturally, greater demand for more expansive sampling causes the conventional deglitcher to become increasingly space-consuming and expensive. Therefore, there exists a need for deglitching circuitry that can operate at high sampling rates and accurately reconstruct input signals to remove glitches while reducing the resources required for increased sampling intervals.